Proceedings ... IEEE International High-Level Design Validation and Test Workshop

Proceedings ... IEEE International High-Level Design Validation and Test Workshop

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Thus, after synthesis of faulty descriptions, a program analyzes the synthesized code to find out which elements of the fault port are unconnected, thus automatically highlighting the presence of redundant faults. Fault [0) Fault [11. Fault [21 .


Title:Proceedings ... IEEE International High-Level Design Validation and Test Workshop
Author:
Publisher: - 2003
ISBN-13:

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